Reading assignments are in red.
All homework assignments are due at the beginning of class on the due date.
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Introduction to Architecture Ch. 1-1.6 |
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Introduction (continued) Technology and Performance Ch. 1.7-1.13 |
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Technology and Performance (continued) |
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Technology and Performance (concluded) Pipelining Appendix A |
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Pipelining (continued) Instruction-Set Architecture Appendix B |
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Instruction-Set Architecture (continued) Appendix B |
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Instruction-Level Parallelism Chapter 2.1-2.3 Homework 1 |
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Instruction-Level Parallelism (continued) Chapter 2.4-2.5 |
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Speculation and Advanced Parallelism Chapter 2.6-2.12 |
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Speculation Limits to ILP Chapter 3.1-3.4 Project descriptions due (beginning of class) |
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FAST conference |
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FAST conference |
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FAST conference |
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Limits to ILP, Simultaneous Multithreading Chapter 3.5-3.9 |
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Shared-Memory Processors Chapter 4.1-4.2 |
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Shared-Memory Processors (cont'd) Chapter 4.1-4.2 Homework 2 |
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Directory-Based Coherence Chapter 4.3-4.4 |
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Spring break |
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Spring break |
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Spring break |
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Spring break |
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Spring break |
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Midterm available Synchronization Chapter 4.5-4.10 |
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Review of Caches Appendix C.1-C.3 |
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Midterm due 11 AM Cache Performance Chapter 5-5.3 |
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Cache and Memory Performance Chapter 5-5.3 |
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Midterm review |
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Virtual Machines Chapter 5.4-5.8 |
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Virtual Machines Project outlines and bibliographies due |
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Storage Reliability Chapter 6-6.4 |
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Storage Reliability |
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Storage Performance Chapter 6.5-6.10 |
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Persistent Solid-State Storage |
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Work on projects |
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Presentation Days |
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Projects Day |
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Presentation Days |
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Senior finals |
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Senior finals Final projects due |
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Finals |
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Finals |
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Finals |
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Finals |
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Finals |
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© 2009, Geoff Kuenning
This page is maintained by Geoff Kuenning.