// file:    io.isc
// author:  Robert Keller 
// purpose: minimal ISC program showing input/output loop

//
// Consider using the following stuff, up to the main program, verbatim
//

// define standard register usage first

register return 0                // standard return address reg
register result 1                // standard result register
register arg1   2                // first argument register

// define fixed locations used for i/o
// (locations -1 to -4 are "wired-in" to the ISC for memory-mapped i/o)

define input_word_loc    -1      // fixed location for input word
define input_status_loc  -2      // fixed location for input status
define output_word_loc   -3      // fixed location for output word
define output_status_loc -4      // fixed location for output status

use input_address                // reserve for input routine address
use output_address               // reserve for output routine address
use zero                         // use to hold 0
use jump_address                 // use to hold one-shot jump addresses

//
// The main program starts here
//

origin 0                         // start loading instructions at location 0

// set up standard register contents

      lim zero 0                 // constant 0

      lim jump_address io_setup  // initialize io
      jsub jump_address return

use loop_address                 // use reg to hold address for looping back
      lim loop_address loop      // initialize address register

// The essence of the main program is the following loop

label loop
      jsub input_address return  // get input value

      copy arg1 result           // copy the input value to arg1 register
 
      jsub output_address return // put output value

      junc loop_address          // go back


//
// Consider using the following stuff verbatim
//

//
// definitions of input/output registers
//

use input_word                            // register to hold input_word
use input_status                          // register to hold input_status
use output_word                           // register to hold output_word
use output_status                         // register to hold input_status


trace 0

//
// routine to set up registers for i/o once and for all
//

label io_setup
      lim output_word    output_word_loc   // memory-mapped output
      lim output_status  output_status_loc // input status
      lim input_word     input_word_loc    // memory-mapped output
      lim input_status   input_status_loc  // input status
      lim input_address  input             // address of input routine
      lim output_address output            // address of output routine
      junc return

use temp

//
// input routine
// returns result in register 'result'
//

label input
      lim   jump_address input       // set up to loop back
      store input_status zero        // wait for input ready
      load  temp input_status        // get input status
      jlt   zero temp zero           // quit (jump to 0) on end-of-file
      load  result input_word        // load from input word
      jeq   jump_address temp zero   // loop back if previous input not done
      junc  return

//
// output routine
// outputs value in register arg1
//

label output
      load  temp output_status       // get output status in temp
      lim   jump_address output      // set up loop address
      jeq   jump_address temp zero   // wait for output ready
      store output_word arg1         // set up for output of result
      store output_status zero       // request output
      junc  return

trace 1